USB3.1/3.0 typeC PHY,  PCIE Gen3 PHY, SATA Gen3 PHY Mass Production in 55nm Successfully

June 2018,Naneng micro offered a total IP solution to a major storage/SSD IC company in china and together completed a USB3.1 typeC + PCIE Gen3 SSD controller IC with this customer.  The SOC chip is using Naneng’s USB3.1/3.0 typeC PHY,  USB2.0 PHY, PCIE Gen3 PHY, SATA Gen3 PHY, 5V-12.V DC-DC, 3.3V-1.2V LDO, and 300M OSC with low temp drift.  Currently the SOC chip has passed ESD testing, reliability testing and burn-in test, also it passed  USB/SATA/PCIE compliance testing with more than 90 mainboards, hard drive/SSD drive and other auxiliary devices.

This SOC chip has moved into mass production on June 2018.

Cadence Asia Management Visited Naneng Micro

On 22nd Dec 2017, Mr. Michael Shih, president of Cadence (Asia Pacific) and his fellow colleagues , visited Naneng micro and investigated the IP portfolio as well as the technology capability of naneng engineering team. Cadence is the one of the largest EDA, IP and designer server solution provider all over the world. During his visit, President Shih explored the potential opportunity w.r.t IP development corporation with Naneng.

GVI PHY IP Move to Mass Production

June 2017, a GVI PHY IP was delivered from naneng micro to  one of the biggest SOC company in china and move to mass production. With a wide data rate range from 500Mbps to 4Gbps, this IP full compiles with General Video Interface HS specification, and it is specially designed to cater for 6000V ESD scenario, both IEC and HBM.

GVI PHY IP was adopted in a smartTV controller SOC and generated million pieces production record.

MIE Fujitsu Visited Naneng Micro

22nd Apr, 2017, Mr. Toyama Koki, the director of MIE Fujitsu Semiconductor, as well as his fellow colleagues, visited Naneng Micro.

MIE Fujitsu Semiconductor Limited is a semiconductor foundry company with over thirty years of manufacturing experience.   MIE Fujitsu provide customer value add services including ultra-low power consumption, non-volatile memory that is researched and developed in our 300 mm wafer fab in MIE, Japan. Using 40 to 90 nm process technologies, MIE Fujitsu Semiconductor manufactures and mass-produces products with a high level of quality control.

During their visit, the guests from MIE Fujitsu has reviewed  IP portfolio and technology capability of Naneng micro, and discussed the potential opportunity of analog/interface IP development.

USB3.1 PHY IP Passed USB Electrical Compliance Test

May 2017, Naneng Micro announced a USB3.1  PHY IP has passed USB electrical compliance test. It is a PHY IP comply with USB 3.1 Gen2 specification, work up to 10Gbps, with Gen1 5Gbps compatibility, this IP can be used directly to support Type-C application. This IP was adopted by a listed company in Taiwan and already move to mass production.

Enlisted in Tianfu (Sichuan) United Share Trading Center

Feb, 2017, Naneng Micro was enlisted in Tianfu (Sichuan) United Share Trading Center (TUSTC),  Approved and funded by Sichuan/Tibet provincial governments, and also mainly targeted at both provinces, TUSTC is a one of the major regional share trading platform in china. The main goal of TUSTC is to serve start-up, small and medium sized enterprises for offering a share trading and fund raise platform before these enterprises move to IPO.

JESD204B PHY IP Move to Production

Oct, 2016, Naneng micro completed a 2 lane flip-chip JESD204 PHY IP core in 65nm node, with 10Gbps per-lane data rate, this IP can reach maximum 20Gbps total bandwidth, and can be used to support ADC/DAC modules for different applications.

This IP fully support all JESD204B features including deterministic latency. It’s been moved to mass production in customer SOC product.