Naneng Micro launches multi-protocol universal video interface physical layer IP core —GVI

Naneng Micro launches multi-protocol universal video interface physical layer IP core —GVI

In January 2020, Chengdu Naneng Microelectronics released a multi-protocol General Video Interface (GVI) physical layer PHY IP core for SOC/ASIC chips. GVI PHY IP is specifically designed for smart TVs, projection equipment, The multi-channel and multi-protocol video transmission PHY IP core designed for monitoring chips, monitors and other types of high-definition video display chips can meet the electrical characteristics and transmission data rate requirements of mainstream video interface protocols such as eDP, MIPI, and VByOne. Compatible with traditional LVDS video transmission technology. The compatibility of the GVI interface, low power consumption, small area, and arbitrarily configurable number of channels provide video SOC customers with great convenience and flexibility in choosing interface IP cores.

As the mainstream transmission protocol for video pixels, LVDS technology has been widely used in TVs, tablets, notebook computers and devices with built-in LCD displays. As the application of high-definition images increases, that is, the display resolution continues to increase, LVDS has been unable to meet the needs of high bandwidth and low power consumption and has become an outdated interface. On this basis, video interface technologies such as MIPI, DP/eDP, and VByOne have become the mainstream, and Naneng micro GVI IP core has emerged as the times require, completing the universal compatibility of the electrical characteristics of these video technologies, giving customers the opportunity to Different video interfaces are conveniently used in the SOC chip and can be switched freely.

MIPI stands for Mobile Industry Processor Interface (Mobile Industry Processor Interface). It is an open standard and a specification for mobile application processors initiated by the MIPI Alliance. MIPI defines a set of interface standards to standardize the internal interfaces of mobile devices such as cameras, display screens, basebands, radio frequency interfaces, etc., thereby increasing design flexibility while reducing cost, design complexity, power consumption and EMI.

V-by-One HS is a signal transmission interface standard for flat panel displays designated by Saion Corporation of Japan. Currently widely used in office equipment such as multi-function printers, in-vehicle entertainment equipment, robots, security systems and other fields. In addition to the SerDes technology, V-by-One HS also uses clock signal recovery and other technologies to make the maximum transmission speed of each pair of lines reach 3.75Gbp, and solve the time lag problem, while also reducing EMI interference and power consumption . In addition, due to the reduction in the number of transmission signals, the amount of wiring and connectors is correspondingly reduced, and the overall cost can be reduced. The main application area of ​​VByOne is to replace LVDS technology in large-scale storage displays and TV products.

eDP is an internal digital interface based on the DisplayPort architecture and protocol. While supporting the transmission of high-definition video signals, it also adds the transmission of high-definition audio signals, and supports higher resolution and refresh rate. It is suitable for tablet computers, notebooks, all-in-ones, and future new large-screen high-resolution mobile phones.

The GVI PHY IP core released by NanoMicro can meet the above-mentioned multiple video signal serial communication standards at the interface electrical characteristics level, so that customers with video interface design requirements SOC/ASIC can flexibly use various next-generation high-speed video interface protocols You can switch between them to enjoy the advantages of GVI IP’s ultra-low power consumption and small area in chip design. At the same time, it can also be compatible with the inherent LVDS transmission mode in specific application scenarios.

Naneng micro has already launched GVI IP at 28nm, 22nm and 40nm nodes in multiple foundries and has completed silicon verification and multiple customer mass production. The maximum channel integration has reached the level of 24 lanes.

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